Power

Spec hygiene (CLAUDE.md rule 1). This document does not restate canonical values (battery capacity, runtime envelope, current draw bands). Those live in CLAUDE.md’s Canonical Hardware Specification. Any value inline is a bug — fix it.

Role

The KN-86 runs on a Waveshare UPS Module 3S powered by 3× 18650 Li-ion cells in series, with 12.6 V barrel-jack charging (ADR-0038). Power topology lives here; runtime, capacity, and current-draw bands are canonical and live in CLAUDE.md Battery row.

Power path

12.6 V 2 A  ->  Waveshare UPS Module 3S  ->  5 V / 5 A rail
barrel in       (3× 18650 in series,             |
(DC5521)         charge + protect + reg)          |
                       |                          |
                       |        +-----------------+-----------------+-------------+
                       |        |          |          |             |             |
                       v        v          v          v             v             v
                  3.3 V/300 mA  Pi Zero 2W MAX98357A  Pi Pico 2   Elecrow 7"   Internal
                  (aux out)     (5V VIN)   (5V VIN)   (5V VBUS)   display      USB hub IC
                                    |                     |       (5V in)
                                    v                     v
                              Pi 3.3V GPIO rail     Pico 3V3 (OUT)
                                                          |
                                                          v
                                                   SSD1322 OLED
                                                   (CIPHER-LINE)

The Waveshare UPS Module 3S is a single board that subsumes charging, cell protection, and 5 V regulation. It charges the 3× 18650 series pack (9.0–12.6 V) from a 12.6 V 2 A input on a DC5521 barrel jack (not USB-C) and regulates a stable 5 V / 5 A main output, plus a 3.3 V / 300 mA auxiliary output. It is a true UPS — charge and output run simultaneously, so the device powers normally while charging. This preserves the ADR-0011 update flow, where the device is cable-attached (now barrel-attached) during flashing.

Onboard chips: S-8254AA (Li protection), SY8286 (5 V regulator), HY2213 (charge balancing), INA219 (voltage/current/power monitor), RT9193 (3.3 V regulator). Protection covers overcharge / over-discharge / overcurrent / short-circuit / reverse. The 18650 holders are reverse-polarity-safe, eliminating the bare-JST polarity hazard of the prior topology (a reversed LiPo destroyed the prior PowerBoost — see ADR-0038 Context).

The 5 V / 5 A rail powers the entire device, including the Elecrow 7” primary display — the display is no longer on its own v0.1 supply (primary-display.md). Typical 5 V-rail draw with the display active is ~1.5–2 A.

On/off control

The prior latching slide switch on the PowerBoost EN / 5 V rail is removed. On/off reconciles to the UPS module’s own power control; the exact mechanism is TBD at bring-up (ADR-0038 §Decision item 8).

3.3 V domains

Three 3.3 V sources, each regulated locally:

UPS module 3.3 V / 300 mA aux output — from the Waveshare board’s RT9193. Available for low-draw 3.3 V peripherals; uncommitted for now.
Pi 3.3 V GPIO rail — Pi Zero 2 W’s onboard regulator. Available at the Pi header for any peripheral that draws from it. Currently uncommitted for new peripherals (the SPI0 / I2S claims that previously drew here moved to the Pico per ADR-0017).
Pico 3V3 (OUT) — Pico 2’s onboard regulator. Drives the SSD1322 auxiliary-display.md. Keeps OLED-related signal + power on a single ground domain (since the SPI lines also originate on the Pico).

All 3.3 V domains share common ground with the 5 V rail.

Runtime envelope

The runtime is now display-dominated because the 7” panel runs off the battery (per ADR-0038). Two operating bands matter:

Display active — current spec. Whole device on the 5 V rail (Pi + Pico 2 + audio + OLED + 7” display). Estimated ~4–5 h; see CLAUDE.md for the canonical band. The display is the dominant load (typical 5 V-rail draw ~1.5–2 A with the panel on).
Electronics-only — display off/blanked. Estimated ~10–12 h. Useful as the upper bound and as the soft-idle target.

These are estimates pending bring-up validation (Stage 4 below).

Mitigations available if real draw exceeds the estimated mid-band materially:

Larger / higher-capacity 18650 cells. Genuine ~3500 mAh cells (Samsung / LG / Sony-Murata / Panasonic) are specified; a matched higher-capacity set lifts runtime without a topology change.
Display backlight dim / blank during soft-idle. Now the highest-leverage idle saving because the display is the dominant load (see Idle behaviour below).
Aggressive Pico dormant-mode gating during idle. Already in the design; <5 mA Pico draw when audio silent + OLED static.
Pico underclock when audio inactive. Drops dynamic power; safe because the OLED ticker workload is far below the Pico’s compute headroom.

Bring-up at Stage 4 measures real rail draw (Pi + Pico active + audio playing + OLED ticker animating + display on) and either confirms the envelope or escalates to revisit CLAUDE.md.

Loads

All loads draw from the Waveshare UPS Module 3S 5 V / 5 A rail (the 5 A headroom is what lets the display join the rail).

Load	From	Notes
Elecrow 7” primary display	5 V rail	Now on the main rail per ADR-0038 — no longer its own v0.1 supply. The dominant load (~1.5–2 A typical with the panel on). See `primary-display.md`.
Pi Zero 2 W	5 V VIN	Primary processor. See `processor.md`.
Pi Pico 2	5 V VBUS	Coprocessor, regulates internally to 3.3 V for SSD1322. See `coprocessor.md`.
MAX98357A	5 V VIN	I2S DAC + class-D amp. Class-D efficiency means quiet output is single-digit mA; volume scales draw. See `audio.md`.
Speaker	Amp output (driven from MAX98357A)	Mono, 8 Ω, 2 W. Disconnects when the 3.5 mm TRS jack has a plug inserted.
SSD1322 CIPHER-LINE OLED	Pico 3V3 (OUT)	Single ground domain with the Pico’s SPI lines. See `auxiliary-display.md`.
Internal USB hub IC	Bus power from Pi OTG	Hub IC + downstream peripherals (keyboard controller + bridge IC).
Keyboard controller	USB bus power via internal hub	See `keyboard.md`.
USB-to-SD bridge IC	USB bus power via internal hub	See `cartridge-interface.md`.

Low-battery behaviour

Battery state is read from the UPS module’s onboard INA219 over I²C (voltage / current / power) per ADR-0038. nOSh polls the INA219 at ~1 Hz and derives state-of-charge from pack voltage (9.0–12.6 V for the 3S pack). This replaces the prior resistor-divider + MCP3008 ADC plan — a host-readable SoC is exactly what the Row-0 battery glyph needs and what a sealed power bank could not provide.

Below threshold, nOSh:

Displays a low-battery glyph in Row 0 of the primary display.
Writes a best-effort deckstate checkpoint near the end of useful capacity.
Initiates a clean shutdown before the protection circuit cuts power.

The UPS module’s S-8254AA protection circuit is the hard backstop — it cuts the pack at the over-discharge threshold regardless of nOSh. The clean-shutdown logic is upstream of that backstop, not a replacement for it.

Idle behaviour

Idle power savings on Zero 2 W are modest compared to a bare-metal MCU — the Linux kernel cannot reach deep sleep without framebuffer and USB-gadget teardown. nOSh implements a soft idle:

Dim (or blank) the Elecrow primary display backlight (HDMI command). Now the highest-leverage idle saving — the display is the dominant load on the 5 V rail per ADR-0038, so dimming/blanking it moves the runtime needle more than any other idle action.
Pause PSG audio output (PSG_RESET over UART to the Pico).
Reduce SDL render cadence.
Let the kernel idle the CPU.

Any HID event wakes the full rendering path. See device/os/power-idle.md for the systemd / userland integration.

Charging

Charging works while the device is on or off. The Waveshare UPS Module 3S is a true UPS — it charges the pack and supplies the 5 V rail simultaneously, so charge-while-using is supported (heat permitting; sustained max-rate charge while running heavy rendering is not the design intent). Charge input is 12.6 V 2 A on a DC5521 barrel jack — not USB-C (per ADR-0038).

The 12.6 V barrel jack is exposed on the Pelican shell edge via a panel-mount connector (enclosure.md). The Pelican wall is drilled only for the panel-mount connector — no structural modification.

Bring-up

Stage 4 in build-specification.md §4:

Seat 3× genuine 18650 cells (matched set) in the Waveshare UPS Module 3S’s reverse-polarity-safe holders. Confirm correct orientation before powering.
Wire the UPS module’s 5 V / 5 A output to the Pi + Pico + amp 5 V rails, the internal USB hub, and the Elecrow 7” display (the display is now on the main rail per ADR-0038).
Wire the Pi’s I²C bus to the UPS module’s INA219; verify nOSh reads voltage/current/power and derives state-of-charge.
Expose the 12.6 V DC5521 barrel jack on the Pelican shell edge via the panel-mount connector; verify charging from a 12.6 V 2 A adapter while the device runs (true-UPS charge + output).
Resolve the on/off control mechanism against the UPS module (TBD per ADR-0038 §Decision item 8).
Measure rail draw under typical load with the display on and electronics-only; confirm both fall within the CLAUDE.md Battery-row bands.

Joint power measurement of the coprocessor path (audio + OLED + cart-IO) is part of Stage 1c (coprocessor.md) — runs before this stage; Stage 4 adds the display load and the INA219 readout.

Sourcing

BOM lines in sourcing-guide.md:

17 — Waveshare UPS Module 3S, 1× (~$34). Waveshare direct (5 V/5 A output, onboard INA219 + S-8254AA/SY8286/HY2213/RT9193).
18 — Genuine 18650 Li-ion cells (~~3500 mAh, Samsung / LG / Sony-Murata / Panasonic), 3× (~~$18 the set). 18650batterystore / IMR-reputable sellers. Matched set; reject unbranded or “fire-button” overspec cells.
19 — 12.6 V 2 A barrel-jack adapter (DC5521), 1× (~$10). Amazon / Digi-Key.
21 — JST-PH connector + hookup wire kit, 1× ($14).